{"id":1173,"date":"2019-11-11T15:06:13","date_gmt":"2019-11-11T07:06:13","guid":{"rendered":"http:\/\/iqotom.com\/?p=1173"},"modified":"2019-11-11T15:06:15","modified_gmt":"2019-11-11T07:06:15","slug":"%e5%85%b3%e4%ba%8e%e7%94%b5%e8%b7%af%e5%9b%be%e4%b8%ad%e7%9a%84smi%e3%80%81sci%e3%80%81pme%e4%b8%89%e4%b8%aa%e4%bf%a1%e5%8f%b7%e7%9a%84%e5%8a%9f%e8%83%bd%e8%a7%a3%e9%87%8a","status":"publish","type":"post","link":"http:\/\/iqotom.com\/?p=1173","title":{"rendered":"\u5173\u4e8e\u7535\u8def\u56fe\u4e2d\u7684SMI#\u3001SCI#\u3001PME#\u4e09\u4e2a\u4fe1\u53f7\u7684\u529f\u80fd\u89e3\u91ca"},"content":{"rendered":"\n<h2 class=\"wp-block-heading\"><strong>SMI#\uff1aSystemManagement Interrupt\uff0c\u7cfb\u7edf\u7ba1\u7406\u4e2d\u65ad<\/strong><\/h2>\n\n\n\n<p>\n\nAn OS-transparent interrupt generated by interrupt events on legacy systems. Bycontrast, on ACPI systems, interrupt events generate an OS-visible interruptthat is shareable (edge-style interrupts will not work). Hardware platforms that wantto support both legacy operating systems and ACPI systems mustsupport a way of remapping the interrupt events between SMIs and SCIs whenswitching betwen ACPI and legacy models.\n\n<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>SCI#\uff1abeyond compare\uff0c\u7cfb\u7edf\u63a7\u5236\u4e2d\u65ad<\/strong><\/h2>\n\n\n\n<p>\n\nA system interrupt used by hardware to notify the OS of ACPI events. The SCI isan active, low, shareable, level interrupt.\n\n<\/p>\n\n\n\n<p class=\"has-text-color has-vivid-red-color\"><strong>\u89e3\u91ca\uff1a<\/strong> SCI#\u4e3b\u8981\u662f\u5728\u8fdb\u5165ACPI\u540e\uff0cACPI\u7528\u7684\u4e2d\u65ad\u4fe1\u53f7\u3002SMI#\u4e00\u822c\u5728ACPI\u72b6\u6001\u4e4b\u524d\u4f7f\u7528\u7684\u7528\u6765\u505a\u540e\u53f0\u4e2d\u65ad\u7684\u4e1c\u897f\u3002\u5728ACPI\u540e \uff0cSMI\u5c31\u81ea\u52a8\u5173\u95ed\uff0c\u5207\u6362\u5230SCI\u7684\u65b9\u5f0f\u3002SMI\u5c11\u91cf\u7684\u4f1a\u5728ACPI\u7684\u72b6\u6001\u4e0b\u8fd8\u53ef\u4ee5\u6b63\u5e38\u5de5\u4f5c\u3002\u4e3b\u8981\u662f\u7528\u6765\u6267\u884c \u4e00\u4e9b\u8d85\u8131\u64cd\u4f5c\u7cfb\u7edf\u7684\u7279\u6b8a\u7684\u4ee3\u7801\u3002\u8054\u60f3\u5f53\u5e74\u7684\u88ab\u7f8e\u56fd\u7981\u7528\u7684\u4e3b\u8981\u539f\u56e0\u5c31\u662fSMI\u7684\u95ee\u9898\u3002\u4ed6\u7684\u6743\u9650\u8d85\u8fc7\u64cd\u4f5c\u7cfb\u7edf\u3002\u8d85\u8131\u5728\u64cd\u4f5c\u7cfb\u7edf\u4e4b\u5916 <\/p>\n\n\n\n<p><strong>\u529f\u80fd\u4e00\u5207\u6b63\u5e38\uff0c\u5c31\u662f\u4e0d\u80fd\u6b63\u5e38\u5173\u673a\u7684\u3002\u5237\u4e86<\/strong><strong>BIOS<\/strong><strong>\u6362\u4e86\u6865\u8fd8\u4e0d\u597d\uff0c\u67e5\u67e5\u8fd9\u4e9b\u5427<\/strong><\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>PME#\uff1aPCI Express Native Power ManagementEvents control<\/strong><\/h2>\n\n\n\n<p> The firmware sets this bit to 1 to grant control over control over PCI Express nativepower management event interrupts (PMEs). If firmware allows the OS control ofthis feature, then in the context of the _OSC method it must ensure that allPMEs are routed to root port interrupts as described in the PCI Express BaseSpecification. Additionally, after control is transferred to the OS, firmwaremust not update the PME Status field in the Root Status register or the PMEInterrupt Enable field in the Root Control register. If control of this featurewas requested and denied or was not requested, firmware returns this bit set to0. <\/p>\n\n\n\n<p class=\"has-text-color has-vivid-red-color\"><strong>\u89e3\u91ca\uff1a<\/strong>\u7535\u6e90\u7ba1\u7406\u7684\u4e2d\u65ad\u3002\u56e0\u4e3a\u5728\u4f11\u7720\u72b6\u6001\u4e0b\uff0c\u8bbe\u5907\u7684\u5176\u4ed6\u4e2d\u65ad\u662f\u5173\u95ed\u7684\uff0c\u53ea\u80fd\u901a\u8fc7\u8fd9\u4e2a\u901a\u77e5\u7cfb\u7edf\u6765\u5524\u9192\u8bbe\u5907\u7528\u7684\u3002\u8bbe\u5907\u4f11\u7720\u4e86\uff0c\u6ca1\u6709\u8fd9\u4e2a\u4fe1\u53f7\uff0c\u7cfb\u7edf\u5c31\u4e0d\u77e5\u9053\u4ec0\u4e48\u65f6\u5019\u8981\u5524\u9192\u4ed6\u3002\u5c31\u4e00\u76f4\u7761\u4e0b\u53bb\u4e86\u3002\u53ef\u80fd\u4f1a\u6574\u4e2a\u7cfb\u7edf\u90fd\u505c\u4e86\u3002 <\/p>\n\n\n\n<p>\u539f\u6587\u5730\u5740\uff1a <a href=\"https:\/\/www.chinafix.com\/thread-1205171-1-1.html\">https:\/\/www.chinafix.com\/thread-1205171-1-1.html<\/a> <\/p>\n","protected":false},"excerpt":{"rendered":"<p>SMI#\uff1aSystemManagement Interrupt\uff0c\u7cfb\u7edf\u7ba1\u7406\u4e2d\u65ad An OS-transparen\u2026 <span class=\"read-more\"><a href=\"http:\/\/iqotom.com\/?p=1173\">Read More &raquo;<\/a><\/span><\/p>\n","protected":false},"author":1,"featured_media":61,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[94],"_links":{"self":[{"href":"http:\/\/iqotom.com\/index.php?rest_route=\/wp\/v2\/posts\/1173"}],"collection":[{"href":"http:\/\/iqotom.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/iqotom.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/iqotom.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/iqotom.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=1173"}],"version-history":[{"count":3,"href":"http:\/\/iqotom.com\/index.php?rest_route=\/wp\/v2\/posts\/1173\/revisions"}],"predecessor-version":[{"id":1176,"href":"http:\/\/iqotom.com\/index.php?rest_route=\/wp\/v2\/posts\/1173\/revisions\/1176"}],"wp:featuredmedia":[{"embeddable":true,"href":"http:\/\/iqotom.com\/index.php?rest_route=\/wp\/v2\/media\/61"}],"wp:attachment":[{"href":"http:\/\/iqotom.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=1173"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/iqotom.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=1173"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/iqotom.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=1173"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}